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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
January 2007
FSA2267 / FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Features
Typical 0.35 On Resistance (RON) for +2.7V supply FSA2267A features less than 10A ICCT current
Description
The FSA2267 and FSA2267A are Dual Single Pole Double Throw (SPDT) analog switches. The FSA2267 operates from a single 1.65V to 3.6V supply, while the FSA2267A operates from a single 2.3V to 4.3V supply. Each features an ultra-low On Resistance of 0.35 at a +2.7V supply and 25C. Both devices are fabricated with sub-micron CMOS technology to achieve fast switching speeds and designed for break-before-make operation. FSA2267A features very low quiescent current, even when the control voltage is lower than the VCC supply. This feature services the mobile handset applications very well allowing for the direct interface with baseband processor general purpose I/Os.
when S Input is lower than VCC
0.25 maximum RON flatness for +2.7V supply 1.6mm x 2.1mm 10-Lead MicroPakTM package Broad VCC operating range Low THD (0.02% typical for 32 load) High current handling capability (350mA continuous
current under 3.3V supply)
Applications
Cell phone PDA Portable media player
Ordering Information
Package Number MAC010A MUA10A Product Code Top LeadMark Free FC FSA 2267 FD FSA 2267A Yes Yes Yes Yes Packing Method 5K Units on Tape and Reel 3K Units on Tape and Reel 5K Units on Tape and Reel 3K Units on Tape and Reel
Order Number FSA2267L10X FSA2267MUX (Preliminary)
Package Description 10-Lead MicroPak, 1.6 x 2.1mm, JEDEC MO-255 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide 10-Lead MicroPak, 1.6 x 2.1mm JEDEC MO-255 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
FSA2267AL10X MAC010A FSA2267AMUX (Preliminary) MUA10A
Pb-Free package per JEDEC J-STD-020B. MicroPakTM is a trademark of Fairchild Semiconductor Corporation.
Application Diagram
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.2
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Analog Symbols
1B0 1B1 2B0 2B1 2A 2S 1A 1S
Connections Diagram
Vcc 1B0 1 10 9 1A
1B0
1B1 2B0 2B1 GND
1 2 3 4 5
10 9 8 7 6
Vcc 1A 1S 2S
1B1
2
8
1S
2B0
3
7
2S
2B1
4
2A
5
6
2A
10-Lead MSOP
GND 10-Lead Micropak
Truth Table
Control Input(s) LOW Logic Level HIGH Logic Level Function B0 Connected to A B1 Connected to A
Pin Descriptions
Pin Names 1A, 2A, 1B0, 1B1, 2B0, 2B1 1S, 2S Function Data Ports Control Input
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.. Symbol VCC VS VIN Supply Voltage Switch Voltage(1) Input Voltage(1) Input Diode Current Switch Current Peak Switch Current (Pulsed at 1ms duration, <10% Duty Cycle) TSTG TJ TL ESD Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 10 seconds) Human Body Model: FSA2267 Human Body Model: FSA2267A Charge Device Model: FSA2267/FSA2267A Notes:
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. 2. Minimums define the acceptable range of current. Negative current should not exceed minimun negative values.
(2)
Parameter
Min. -0.5 -0.5 -0.5 -50
Max. +5.5 VCC + 0.5 VCC 350 500
Unit V V V mA mA mA C C C V V V
-65
+150 +150 +260 7500 7000 1000
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Supply Voltage FSA2267 FSA2267A VIN VSW TA Notes:
3. Unused inputs must be held HIGH or LOW. They may not float.
Parameter
Min. 1.65 2.3 0 0 -40
Max. 3.6 4.3 VCC VCC +85
Unit V V V V C
Control Input Voltage(3) Switch Input Voltage Operating Temperature
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
ESD Protection
ESD Performance of the FSA2267/FSA2267A
FSA2267 HBM all pins 7.0kV CDM all pins 1.0kV FSA267A
HBM all pins 7.5kV CDM all pins 1.0kV
Figure 1. Human Body ESD Test Model
Human Body Model
Figure 1 shows the schematic representation of the Human Body Model ESD event. Figure 2 is the ideal waveform representation of the Human Body Model. The device is tested to JEDEC: JESD22-A114 Human Body Model.
Charged Device Model
In manufacturing test and handling environments, a more useful model is the Charged Device Model and the FSA2267/FSA2267A has a very good ESD immunity to this model. The device is tested to JEDEC: JESD-C101 Charged Device Model. Figure 2. HBM Current Waveform
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment and evaluates the equipment in its entirety for ESD immunity. Fairchild Semiconductor has evaluated this device using the IEC 6100-4-2 representative system model depicted in Figure 3. ESD values measured via the IEC 61000-4-2 evaluation method are influenced by the specific board layout, board size, and many other factors of the manufacturer's product application. Measured system ESD values cannot be guaranteed by Fairchild Semiconductor to exactly correlate to a manufacturer's in-house testing due to these application environment variables. Fairchild Semiconductor has been able to determine that, for ultra-portable applications, an enhanced ESD immunity, relative to the IEC 61000-4-2 specification, can be achieved with the inclusion of a 100-series resistor in the VCC supply path to the analog switch (see Figure 4). Typical improvements of between 3-6kV of ESD immunity (I/O to GND) have been measured with the inclusion of the resistor with the IEC 61000-4-2 representative model. For more information on ESD testing methodologies, please refer to: AN-6019 Fairchild Analog Switch Products ESD Test Methodology Overview http://www.fairchildsemi.com/an/AN/AN-6019.pdf.
Figure 3. IEC 61000-4-2 ESD Test Model
Analog Switch Supply Rail
100
1B0 1B1 2B0 2B1
VCC 1A 1S 2A 2S Ultra-portable Connector ESD Event
Additional ESD Test Conditions
For information regarding test methodologies and performance levels, please contact Fairchild Semiconductor.
Figure 4. ESD Immunity with 100 Resistor
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.2 4
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267 DC Electrical Characteristics
All typical values are at 25C unless otherwise specified. VCC Symbol
VIH
TA = +25C
TA= -40 to +85C
2.0 1.7 0.65 VCC 0.8 0.7 0.35 VCC -0.5 0.5 50 50 50 50 50 50 0.60 0.75 3.9 0.075 0.080 0.25 0.3 nA A nA V V
Parameter
Input Voltage High
Conditions
(V)
2.7 to 3.6 2.3 to 2.7 1.65 to 1.95
Min. Typ. Max. Min. Max. Units
VIL
Input Voltage Low
2.7 to 3.6 2.3 to 2.7 1.65 to 1.95
IIN INO(OFF), INC(OFF)
Control Input Leakage OFF-Leakage Current of Port nB0 and nB1
VIN = 0V to VCC nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating
1.65 to 3.6 3.6 2.7 1.95 3.6 2.7 1.95 2.7 2.3 1.65 2.7 2.3 1.65 2.7 2.3 1.65 0.3 -100 100 3.6 -5.0 -5.0 -5.0 -5.0 -5.0 -5.0 0.35 0.45 1.0 0.040 0.040 0.1 5.0 5.0 5.0 5.0 5.0 5.0
-50 -50 -50 -50 -50 -50
IA(ON)
ON Leakage Current of Port 1A and 2A
nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating nA = 0.3V, 1.65V, nB0 or nB1 = 0.3V, 1.65V or floating
RON
Switch On Resistance(4) See Figure 5
IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 1.6V, 2.3V IOUT = 100mA, nB0 or nB1 = 0.8V
RON
On Resistance Matching Between Channels(5)
IOUT = 100mA, nB0 or nB1 = 0.7V
RFLAT(ON) On Resistance Flatness(6)
IOUT = 100mA, nB0 or nB1 = 0V to VCC
ICC
Quiescent Supply Current
VIN = 0V or VCC, IOUT = 0A
-500
500
nA
4. On Resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 5. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 6. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions.
(c) 2005 Fairchild Semiconductor Corporation FSA2267 / FSA2267A Rev. 1.0.2 5
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267A DC Electrical Characteristics
All typical values are at 25C unless otherwise specified. VCC Symbol
VIH
TA = +25C
TA= -40 to +85C
1.7 1.5 1.4 0.7 0.5 0.4 -0.5 0.5 100 50 50 200 50 50 0.6 0.6 0.6 nA A nA V V
Parameter
Input Voltage High
Conditions
(V)
3.6 to 4.3 2.7 to 3.6 2.3 to 2.7
Min. Typ. Max. Min. Max. Units
VIL
Input Voltage Low
3.6 to 4.3 2.7 to 3.6 2.3 to 2.7
IIN INO(OFF), INC(OFF)
Control Input Leakage OFF-Leakage Current of Port nB0 and nB1
VIN = 0V to VCC nA = 0.3V, 4.0V, nB0 or nB1 = 4.0V, 0.3V or floating nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 2.4V, nB0 or nB1 = 0.3V, 2.4V or floating
2.3 to 4.3 4.3 3.6 2.7 4.3 3.6 2.7 4.3 3.0 2.7 1.65 4.3 3.0 2.7 1.65 -10.0 -5.0 -5.0 -20.0 -5.0 -5.0 0.35 0.35 0.35 1.0 0.04 0.04 0.04 0.1 0.15 0.15 0.15 0.3 -100 80 7.0 0.5 100 10.0 2.0 10.0 5.0 5.0 20.0 5.0 5.0
-100 -50 -50 -200 -50 -50
IA(ON)
ON Leakage Current of Port 1A and 2A
nA = 0.3V, 4.0V, nB0 or nB1 = 0.3V, 4.0V or floating nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating nA = 0.3V, 3.3V, nB0 or nB1 = 0.3V, 3.3V or floating
RON
Switch On Resistance(7)
IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 3.6V, 4.3V IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.3V, 3.0V IOUT = 100mA, nB0 or nB1 = 0V, 0.7V, 2.0V, 2.7V IOUT = 100mA, nB0 or nB1 = 0.8V
RON
On Resistance Matching Between Channels(8) See Figure 6
IOUT = 100mA, nB0 or nB1 = 0.7V
0.075 0.075 0.075 0.25 0.25 0.25 -500 500 15.0 7.0
RFLAT(ON) On Resistance Flatness(9)
IOUT = 100mA, nB0 or nB1 = 0V to VCC
4.3 3.0 2.7 1.65
ICC ICCT
Quiescent Supply Current Increase in ICC per Input
VIN = 0V or VCC, IOUT = 0A VIN = 1.8V VIN = 2.6V
4.3 4.3
nA A
7. On Resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 8. RON = RONmax - RONmin measured at identical VCC, temperature, and voltage. 9. Flatness is defined as the difference between the maximum and minimum value of RON over the specified range of conditions.
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267 AC Electrical Characteristics
All typical values are at 25C unless otherwise specified. Symbol
tON
Parameter
Turn ON Time
Conditions
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF
VCC (V)
2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 2.7 to 3.6
TA = +25C
TA= -40 to Figure +85C Units Number
42.0 40.0 38.0 18.0 20.0 25.0 2.0 2.0 2.0 ns Figure 8 ns Figure 7 ns Figure 7
Min. Typ. Max. Min. Max.
30.0 29.0 27.0 13.0 14.0 15.0 17.0 15.0 12.0 9.0 9.0 9.0 -80.0 -80.0 -80.0 -80.0 -80.0 -80.0 45.0 0.024 0.015 0.35 MHz Figure 12 dB Figure 9 dB Figure 9 38.0 37.0 35.0 16.0 18.0 21.0
tOFF
Turn OFF Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF
tB-M
Break-BeforeMake Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35 pF
Q
Charge Injection
CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0
pC
Figure 10
OIRR
OFF-Isolation f = 100kHz, RL = 50, CL = 5 pF (Stray)
2.3 to 2.7 1.65 to 1.95 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95 1.65 to 3.6 2.7 to 3.6 2.3 to 2.7 1.65 to 1.95
Xtalk
Crosstalk
f = 100kHz, RL = 50, CL = 5 pF (Stray)
BW THD
-3db Bandwidth Total Harmonic Distortion
RL = 50 RL = 32, VIN = 2Vpk-pk, f= 20Hz to 20kHz RL = 32, VIN = 1.5Vpk-pk, f= 20Hz to 20kHz RL = 32, VIN = 1.2Vpk-pk, f= 20Hz to 20kHz
%
Figure 13
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
FSA2267A AC Electrical Characteristics
All typical value are at 25C unless otherwise specified. Symbol
tON
Parameter
Turn ON Time
Conditions
nB0 or nB1 = 1.5V, RL = 50, CL = 35pF
VCC (V)
3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65
TA = +25C
TA= -40 to +85C Units
48.0 57.0 ns
Min. Typ. Max. Min. Max.
37.0 37.0 60 570 15.0 16.0 50.0 500 8.0 8.0 8.0 24.0 24.0 24.0 -75.0 -75.0 -75.0 -70.0 -70.0 -70.0 45.0 0.02 0.02 0.02 MHz dB dB 2.0 2.0 2.0 ns 23.0 30.0 25.0 30.0 ns 46.0 50.0
Figure Number
Figure 7
tOFF
Turn OFF Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35pF
3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 1.65
Figure 7
tB-M
Break-BeforeMake Time
nB0 or nB1 = 1.5V, RL = 50, CL = 35pF
3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7 2.3 to 4.3 3.6 to 4.3 2.7 to 3.6 2.3 to 2.7
Figure 8
Q
Charge Injection
CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0 CL = 100 pF, VGEN = 0V, RGEN = 0
pC
Figure 10
OIRR
OFF-Isolation
f = 100kHz, RL = 50, CL = 5pF (Stray)
Figure 9
Xtalk
Crosstalk
f = 100kHz, RL = 50, CL = 5pF (Stray)
Figure 9 Figure 12
BW THD
-3db Bandwidth Total Harmonic Distortion
RL = 50 RL = 32, VIN = 2Vpk-pk, f= 20Hz to 20kHz RL = 32, VIN = 1.5Vpk-pk, f= 20Hz to 20kHz RL = 32, VIN = 1.2Vpk-pk, f= 20Hz to 20kHz
%
Figure 13
Capacitance
Symbol
CIN COFF CON
Parameter
Control Pin Input Capacitance B Port OFF Capacitance A Port ON Capacitance
Conditions
f=1Mhz f=1Mhz f=1Mhz
VCC (V)
0.0 3.3 3.3
TA = +25C
TA= -40 to +85C Units pF pF pF
Min. Typ. Max. Min. Max.
1.5 30.0 126
Figure Number
Figure 11 Figure 11 Figure 11
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Typical Characteristics
Figure 5. RON at 2.7V for FSA2267
Figure 6. RON at 2.7V for FSA2267A
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
AC Loading and Waveforms
CL includes Fixture and Stray Capacitance.
Logic input waveforms are inverted for switches with opposite logic sense.
Figure 7. Turn-On/Turn-Off Timing
CL Includes Fixture and Stray Capacitance Figure 8. Break-Before-Make Timing
Figure 9. Off Isolation and Crosstalk
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
AC Loading and Waveforms (Continued)
Q = (DVOUT)(CL) Figure 10. Charge Injection
Figure 11. On/Off Capacitance Measurement Setup
Figure 12. Bandwidth
Figure 13. Harmonic Distortion
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Tape and Reel Specification
Tape Format For MicroPak 10
Dimensions are in millimeters (inches) unless otherwise noted. Package Designator L10X Tape Section Leader (Start End) Carrier Trailer (Hub End) Cavity Number 125 (typ) 5000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed
Reel Dimensions
Tape Size 8 mm
A 7.0 (177.8)
B 0.059 (1.50)
C 0.512
D 0.795
N 2.165
W1 0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00)
W2 0.567 (14.40)
W3 W1 + 0.078/-0.039 (W1 + 2.00/-1.00)
(13.00) (20.20) (55.00)
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 14. Pb-Free 10-Lead MicroPak, 1.6 x 2.1mm
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 15. Pb-Free 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm wide
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FSA2267/FSA2267A 0.35 Low-Voltage Dual-SPDT Analog Switch
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